Silicon Alliance: Arm & Synopsys Target AI Data Centre Loads

Arm and Synopsys are aligning their capabilities to address one of the most pressing challenges in data centre infrastructure – designing silicon that can support increasingly complex AI workloads while maintaining efficiency and reliability.
The partnership centres on the development of the Arm AGI CPU. This marks the first stage of Arm extending its compute platform into production silicon, moving beyond design frameworks into fully-realised chips intended for deployment in next-generation data centre environments.
As demand for AI accelerates, data centres require processors capable of handling intensive training and inference workloads. These workloads involve both building AI models and running them in real time, placing pressure on power consumption, thermal management and overall system performance.
The collaboration between Arm and Synopsys directly targets these constraints through a combination of design tools, interface technologies and verification systems.
Designing silicon for AI workloads
At the core of the partnership is a focus on system-on-chip design (SoC) – which integrates multiple computing components into a single chip. This approach is essential for modern data centres, where performance density and energy efficiency are critical.
Mohamed Awad, Executive Vice President of the Cloud AI Business Unit at Arm, outlines the importance of rigorous validation across the entire system: "Designing data centre silicon for increasingly complex AI workloads requires rigorous validation across the full system.
"The Arm AGI CPU reflects the strength of our SoC design and the effectiveness of our collaboration with Synopsys. Their design, IP and verification solutions supported the development and validation of our breakthrough performance-per-watt chip for next-generation AI infrastructure."
Synopsys plays an important rolein enabling the project’s technical delivery, particularly in achieving a balance between performance and energy use – a key metric in hyperscale data centres where operational costs and sustainability targets are closely linked.
The AGI CPU is built on Arm’s Neoverse CSS V3 architecture, a platform specifically designed for cloud and data centre deployments. It is engineered to support scalable, high-performance computing environments, allowing operators to deploy infrastructure capable of adapting to evolving AI workloads without constant redesign.
Full-stack design and verification
Synopsys contributes a full-stack design portfolio to the collaboration, covering electronic design automation, interface intellectual property and hardware-assisted verification.
This integrated approach allows engineers to simulate, validate and refine chip designs with greater speed and accuracy. Tools such as Synopsys VCS, Fusion Compiler and PrimeTime support processes including synthesis, timing validation and power integrity analysis. These steps are essential in ensuring that chips meet performance targets while remaining stable under demanding workloads.
Ravi Subramanian, Chief Product Management Officer at Synopsys, highlights the collaborative nature of the project. “This achievement reflects exceptional engineering discipline, and we're proud that Synopsys design, IP and advanced verification solutions played a mission-critical role in delivering this innovation.”
Ravi reinforces the importance of combining design precision with verification at scale. For data centre operators, this translates into reduced deployment risk and improved reliability, particularly as AI infrastructure becomes more complex.
Supporting scalable data centre infrastructure
Beyond chip design, the partnership addresses broader challenges in scaling data centre infrastructure. High-performance AI environments require not only powerful processors but also efficient integration with networking, memory and storage systems.
Synopsys’ interface IP solutions help accelerate subsystem development by providing pre-validated components that reduce integration risk. These solutions enable faster time to production, allowing data centre operators to deploy new hardware more quickly in response to demand.
Hardware-assisted verification platforms such as ZeBu Server 5 and HAPS prototyping systems further support this process. These platforms enable early testing of software and system performance before chips are physically manufactured, reducing costly delays and ensuring readiness for deployment.
For data centres, where uptime and performance are critical, this level of pre-validation is essential. It allows operators to introduce new silicon with confidence, knowing it has been tested across a wide range of scenarios.
The collaboration also feeds into the wider Arm Total Design ecosystem, which brings together partners to streamline the development of custom silicon. This ecosystem approach supports faster innovation cycles and reduces the complexity associated with building specialised chips for AI workloads.
As AI continues to reshape data centre requirements, the ability to design, validate and deploy efficient silicon becomes a defining factor. Arm and Synopsys are positioning their joint effort to meet these demands through a combination of scalable architecture, advanced tooling and tightly-integrated workflows.



